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ts321 slos489c ? december 2005 ? revised april 2015 ts321 low-power single operational amplifier 1 features 3 description the ts321 is a bipolar operational amplifier for cost- 1 ? wide power-supply range sensitive applications in which space savings are ? single supply from 3 v to 30 v important. ? dual supply from 1.5 v to 15 v device information (1) ? large output voltage swing from part number package body size (nom) 0 v to 3.5 v (minimum) (v cc = 5 v) soic (14) 4.90 mm 3.90 mm ? low supply current at 500 a (typical) ts321 sot-23 (5) 2.90 mm 1.60 mm ? low input bias current at 20 na (typical) (1) for all available packages, see the orderable addendum at ? stable with high capacitive loads the end of the datasheet. 2 applications ? desktop pcs ? hvac: heating, ventilating, and air conditioning ? portable media players ? refrigerators ? washing machines: high-end and low-end 4 device pinouts 1 an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. 1 2 3 6 7 8 4 5 out v cc+ inC in+ v ccC nc nc nc 1 2 5 out v cc+ 3 4 in+ inC v ccC productfolder sample &buy technical documents tools & software support &community
ts321 slos489c ? december 2005 ? revised april 2015 www.ti.com table of contents 8.2 functional block diagram ......................................... 7 1 features .................................................................. 1 8.3 feature description ................................................... 7 2 applications ........................................................... 1 8.4 device functional modes .......................................... 8 3 description ............................................................. 1 9 application and implementation .......................... 9 4 device pinouts ....................................................... 1 9.1 application information .............................................. 9 5 revision history ..................................................... 2 9.2 typical application ................................................... 9 6 pin configuration and functions ......................... 3 10 power supply recommendations ..................... 10 7 specifications ......................................................... 4 11 layout ................................................................... 10 7.1 absolute maximum ratings ..................................... 4 11.1 layout guidelines ................................................. 10 7.2 esd ratings .............................................................. 4 11.2 layout example .................................................... 11 7.3 recommended operating conditions ....................... 4 12 device and documentation support ................. 12 7.4 thermal information .................................................. 4 12.1 documentation support ....................................... 12 7.5 electrical characteristics ........................................... 5 12.2 trademarks ........................................................... 12 7.6 typical characteristics .............................................. 6 12.3 electrostatic discharge caution ............................ 12 8 detailed description .............................................. 7 12.4 glossary ................................................................ 12 8.1 overview ................................................................... 7 5 revision history changes from revision b (december 2013) to revision c page ? added pin configuration and functions section, esd ratings table, feature description section, device functional modes , application and implementation section, power supply recommendations section, layout section, device and documentation support section, and mechanical, packaging, and orderable information section .............................. 1 ? changed v ol units typo from v to mv .................................................................................................................................... 5 2 submit documentation feedback copyright ? 2005 ? 2015, texas instruments incorporated product folder links: ts321
ts321 www.ti.com slos489c ? december 2005 ? revised april 2015 6 pin configuration and functions d package 8-pin soic (top view) dbv package 5-pin sot-23 (top view) pin functions pin i/o description name soic no. sot-23 no. in ? 2 4 i negative input in+ 3 3 i positive input 1 nc (1) 5 ? ? do not connect 8 out 6 1 o output v cc ? 4 2 ? negative supply v cc+ 7 5 ? positive supply (1) nc ? no internal connection copyright ? 2005 ? 2015, texas instruments incorporated submit documentation feedback 3 product folder links: ts321 1 2 3 6 7 8 4 5 out v cc+ inC in+ v ccC nc nc nc 1 2 5 out v cc+ 3 4 in+ inC v ccC
ts321 slos489c ? december 2005 ? revised april 2015 www.ti.com 7 specifications 7.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit single supply 32 v cc supply voltage v dual supplies 16 v id differential input voltage (2) 32 v v i input voltage range (3) ? 0.3 32 v i ik input current 50 ma t short duration of output short circuit to ground unlimited t j operating virtual junction temperature 150 c t stg storage temperature ? 65 150 c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) differential voltages are at in+ with respect to in ? . (3) input voltages are at in with respect to v cc ? . 7.2 esd ratings value unit human-body model (hbm), per ansi/esda/jedec js-001 (1) 2500 v (esd) electrostatic discharge v charged-device model (cdm), per jedec specification jesd22- 1500 c101 (2) (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 7.3 recommended operating conditions min max unit single supply 3 30 v cc supply voltage v dual supply 1.5 15 t a operating free-air temperature ? 40 125 c 7.4 thermal information ts321 thermal metric (1) d (soic) dbv (sot-23) unit 5 pin 5 pin r ja junction-to-ambient thermal resistance (2) (3) 97 206 c/w (1) for more information about traditional and new thermal metrics, see the ic package thermal metrics application report, spra953 . (2) maximum power dissipation is a function of tj(max), qja, and ta. the maximum allowable power dissipation at any allowable ambient temperature is pd = (tj(max) ? ta)/qja. selecting the maximum of 150 c can affect reliability. (3) the package thermal impedance is calculated in accordance with jesd 51-7. 4 submit documentation feedback copyright ? 2005 ? 2015, texas instruments incorporated product folder links: ts321
ts321 www.ti.com slos489c ? december 2005 ? revised april 2015 7.5 electrical characteristics v cc+ = 5 v, v cc ? = gnd, v o = 1.4 v (unless otherwise noted) parameter test conditions t a min typ max unit 25 c 0.5 4 r s = 0, 5 v < v cc+ < 30 v, v io input offset voltage mv 0 < v ic < (v cc+ ? 1.5 v) full range 5 25 c 2 30 i io input offset current na full range 50 25 c 20 150 i ib input bias current (1) na full range 200 25 c 50 100 large-signal differential voltage v cc = 15 v, r l = 2 k ? , a vd v/mv amplification v o = 1.4 v to 11.4 v full range 25 25 c 0 v cc+ ? 1.5 v icr common-mode input voltage (2) v cc = 30 v v full range 0 v cc+ ? 2 25 c 26 27 r l = 2 k ? full range 25.5 v cc = 30 v 25 c 27 28 v oh high-level output voltage r l = 10 k ? v full range 26.5 25 c 3.5 v cc = 5 v r l = 2 k ? full range 3 25 c 5 15 v ol low-level output voltage r l = 10 k ? mv full range 20 v cc = 30 v, v i = 10 mv, r l = 2 k ? , gbp gain bandwidth product 25 c 0.8 mhz f = 100 khz, c l = 100 pf v cc = 15 v, v i = 0.5 v to 3 v, sr slew rate 25 c 0.4 v/ s r l = 2 k ? , c l = 100 pf, unity gain m phase margin 25 c 60 cmrr common-mode rejection ratio r s 10 k ? 25 c 65 85 db i source output source current v cc = 15 v, v o = 2 v, v id = 1 v 25 c 20 40 ma v o = 2 v 25 c 10 20 ma i sink output sink current v cc = 15 v, v id = 1 v v o = 0.2 v 25 c 12 50 a i o short-circuit to gnd v cc = 15 v 25 c 40 60 ma svr supply-voltage rejection ratio v cc = 5 v to 30 v 25 c 65 110 db v cc = 5 v 500 800 25 c v cc = 30 v 600 900 i cc total supply current no load a v cc = 5 v 600 900 full range v cc = 30 v 1000 v cc = 30 v, v o = 2 v pp , a v = 20 db, thd total harmonic distortion 25 c 0.015% r l = 2 k ? , f = 1 khz, c l = 100 pf e n equivalent input noise voltage v cc = 30 v, f = 1 khz, r s = 100 ? 25 c 50 nv/ hz (1) the direction of the input current is out of the device. this current essentially is constant, independent of the state of the output, so no loading change exists on the input lines. (2) the input common-mode voltage of either input signal should not be allowed to go negative by more than 0.3 v. the upper end of the common-mode voltage range is v cc+ ? 1.5 v, but either or both inputs can go to 32 v without damage. copyright ? 2005 ? 2015, texas instruments incorporated submit documentation feedback 5 product folder links: ts321
ts321 slos489c ? december 2005 ? revised april 2015 www.ti.com 7.6 typical characteristics figure 1. input current vs temperature figure 2. supply current vs temperature figure 3. output sinking characteristics figure 4. output sourcing characteristics figure 5. short circuit current to supply (1) figure 6. short circuit current to ground (1) short circuits from outputs to vcc can cause excessive heating and eventual destruction. 6 submit documentation feedback copyright ? 2005 ? 2015, texas instruments incorporated product folder links: ts321 0.0 0.5 1.0 1.5 2.0 2.5 50 25 0 25 50 75 100 125 voltage from vcc+ (v) temperature (c) iout = 3ma iout = 15ma c001 0 5 10 15 20 25 30 35 40 45 50 25 0 25 50 75 100 125 input bias (na) temperature (c) vcc = 5v c001 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 50 25 0 25 50 75 100 125 icc (ma) temperature (c) vcc = 5v vcc = 30v c001 0 5 10 15 20 25 50 25 0 25 50 75 100 125 output (ma) temperature (c) vcc = 15v c001 45 40 35 30 25 20 15 10 5 0 50 25 0 25 50 75 100 125 output (ma) temperature (c) vcc = 15v c001 0.0 0.5 1.0 1.5 2.0 2.5 0.01 0.1 1 10 vol (v) iol (ma) -40c 25c 125c c001
ts321 www.ti.com slos489c ? december 2005 ? revised april 2015 8 detailed description 8.1 overview the ts321 is a single-channel operational amplifier. it can handle a single supply between 3 v and 30 v or a dual-supply between 1.5 v and 15 v. available in the small sot-23 package, the ts321 is great for saving space in any application. 8.2 functional block diagram 8.3 feature description 8.3.1 operating voltage the ts321 can be powered from a single supply between 3 v and 30 v or a dual-supply between 1.5 v and 15 v. 8.3.2 gain bandwidth product gain bandwidth product is found by multiplying an amplifier's measured bandwidth by the gain at which that bandwidth was measured. the ts321 has a gain bandwidth of 0.8 mhz. 8.3.3 slew rate the slew rate is the rate at which an operational amplifier can change its output when there is a change on the input. the ts321 has a 0.4-v/ s slew rate. copyright ? 2005 ? 2015, texas instruments incorporated submit documentation feedback 7 product folder links: ts321 v cc inC in+ out
ts321 slos489c ? december 2005 ? revised april 2015 www.ti.com feature description (continued) 8.3.4 input common mode range the valid common mode range is from device ground pin to vcc ? 1.5 v (vcc ? 2 v across temperature). inputs may exceed vcc up to the maximum vcc without device damage. at least one input must be in the valid input common mode range for output to be correct phase. if both inputs exceed valid range then output phase is undefined. if either input is less than -0.3 v then input current should be limited to 1 ma and output phase is undefined. 8.3.5 stability with high capacitive loads operational amplifiers have reduced phase margin when there is a direct capacitance on the output. the stability is affected most when the amplifier is set to unity gain. small signal response to a step input of 100 mv reveals the loop stability with a range of capacitors. see application note slva381 to correlate response waveform to phase margin. the responses at 1 nf or less indicate acceptable phase margin. the responses at 1 uf and above indicate good phase margin. figure 7. small signal response 8.4 device functional modes the ts321 is powered on when the supply is connected. this device can be operated as a single supply operational amplifier or dual supply amplifier depending on the application. 8 submit documentation feedback copyright ? 2005 ? 2015, texas instruments incorporated product folder links: ts321 100 pf 100 nf 1 nf 1 f 10 f 10 nf
ts321 www.ti.com slos489c ? december 2005 ? revised april 2015 9 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 9.1 application information the ts321 operational amplifier is useful in a wide range of signal conditioning applications. inputs can be powered before vcc for flexibility in multiple supply circuits. 9.2 typical application a typical application for an operational amplifier in an inverting amplifier. this amplifier takes a positive voltage on the input, and makes it a negative voltage of the same magnitude. in the same manner, it also makes negative voltages positive. figure 8. typcial application schematic 9.2.1 design requirements the supply voltage must be chosen such that it is larger than the input voltage range and output range. for instance, this application will scale a signal of 0.5 v to 1.8 v. setting the supply at 12 v is sufficient to accommodate this application. 9.2.2 detailed design procedure determine the gain required by the inverting amplifier: (1) (2) once the desired gain is determined, choose a value for ri or rf. choosing a value in the kilohm range is desirable because the amplifier circuit will use currents in the milliamp range. this ensures the part will not draw too much current. this example will choose 10 k for ri which means 36 k will be used for rf. this was determined by equation 3. (3) copyright ? 2005 ? 2015, texas instruments incorporated submit documentation feedback 9 product folder links: ts321 vsup+ + v out rf v in ri vsup-
ts321 slos489c ? december 2005 ? revised april 2015 www.ti.com typical application (continued) 9.2.3 application curve figure 9. input and output voltages of the inverting amplifier 10 power supply recommendations the ts321 is specified to operate between 3 v and 30 v or a dual supply between 1.5 v and 15 v. caution supply voltages larger than 32 v for a single supply, or outside the range of 16 v for a dual supply can permanently damage the device (see the absolute maximum ratings ). place 0.1- f bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high impedance power supplies. for more detailed information on bypass capacitor placement, refer to the layout . 11 layout 11.1 layout guidelines for best operational performance of the device, use good pcb layout practices, including: ? noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry. ? connect low-esr, 0.1- f ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. a single bypass capacitor from v+ to ground is applicable for single supply applications. ? separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. one or more layers on multilayer pcbs are usually devoted to ground planes. a ground plane helps distribute heat and reduces emi noise pickup. make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. for more detailed information, refer to application note sloa089 . ? to reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. if it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as 10 submit documentation feedback copyright ? 2005 ? 2015, texas instruments incorporated product folder links: ts321 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 0 0.5 1 1.5 2 volts time (ms) vin vout
ts321 www.ti.com slos489c ? december 2005 ? revised april 2015 layout guidelines (continued) opposed to in parallel with the noisy trace. ? place the external components as close to the device as possible. keeping rf and rg close to the inverting input minimizes parasitic capacitance, as shown in layout example . ? keep the length of input traces as short as possible. always remember that the input traces are the most sensitive part of the circuit. ? consider a driven, low-impedance guard ring around the critical traces. a guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 11.2 layout example figure 10. operational amplifier schematic for noninverting configuration figure 11. operational amplifier board layout for noninverting configuration copyright ? 2005 ? 2015, texas instruments incorporated submit documentation feedback 11 product folder links: ts321 + rin rg rf vout vin nc vcc+ in1 in1+ vcc nc out nc rg rin rf gnd vin vs- gnd vs+ gnd run the input traces as far away from the supply lines as possible only needed for dual-supply operation place components close to device and to each other to reduce parasitic errors use low-esr, ceramic bypass capacitor (or gnd for single supply) ground (gnd) plane on another layer vout
ts321 slos489c ? december 2005 ? revised april 2015 www.ti.com 12 device and documentation support 12.1 documentation support 12.1.1 related documentation for more information, see the following: ? simplifying stability checks, slva381 ? circuit board layout techniques, sloa089 12.2 trademarks all trademarks are the property of their respective owners. 12.3 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 12.4 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 12 submit documentation feedback copyright ? 2005 ? 2015, texas instruments incorporated product folder links: ts321
package option addendum www.ti.com 28-may-2015 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples ts321id active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 sr321i ts321idbvr active sot-23 dbv 5 3000 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 125 (9c1g ~ 9c1s) ts321idbvre4 active sot-23 dbv 5 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 9c1g TS321IDBVRG4 active sot-23 dbv 5 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 9c1g ts321idbvt active sot-23 dbv 5 250 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 125 (9c1g ~ 9c1s) ts321idr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 sr321i (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device.
package option addendum www.ti.com 28-may-2015 addendum-page 2 (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of ts321 : ? automotive: ts321-q1 note: qualified version definitions: ? automotive - q100 devices qualified for high-reliability automotive applications targeting zero defects
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant ts321idbvr sot-23 dbv 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 q3 ts321idbvr sot-23 dbv 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 q3 TS321IDBVRG4 sot-23 dbv 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 q3 ts321idbvt sot-23 dbv 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 q3 ts321idr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 package materials information www.ti.com 29-may-2015 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) ts321idbvr sot-23 dbv 5 3000 202.0 201.0 28.0 ts321idbvr sot-23 dbv 5 3000 180.0 180.0 18.0 TS321IDBVRG4 sot-23 dbv 5 3000 180.0 180.0 18.0 ts321idbvt sot-23 dbv 5 250 180.0 180.0 18.0 ts321idr soic d 8 2500 340.5 338.1 20.6 package materials information www.ti.com 29-may-2015 pack materials-page 2

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